cell logic
英 [sel ˈlɒdʒɪk]
美 [sel ˈlɑːdʒɪk]
网络 细胞逻辑
双语例句
- Because a cell property's value can be an MDX expression, you can perform conditional logic to determine whether the font will be roman or boldface.
由于一个MDX只能设置一个单元格属性，所以只能通过条件逻辑判断是显示罗马字体还是黑体。 - The base circuit cell of the de-cision circuit is source-coupled field-effect transistor logic ( SCFL) circuit.
判决电路的基本单元为源耦合场效应晶体管逻辑（SCFL）电路，时钟提取电路由预处理器和锁相环构成。 - The architecture and logical design of ingress process module, which includes receive control FSM, send control FSM and cell position adjustment logic;
通信协议转换逻辑上行方向的系统分析及体系结构设计，包括上行接收状态机、发送状态机、信元内字节位置调整机制等的设计； - It can be applied to extract logic parameters for circuit cell and establish logic parameter library.
该工具可应用于单个电路的逻辑参数的提取，也可应用于逻辑参数库的建立。 - Therefor, the characters, words and abstract grammar rule are corresponding to input nerve cell by the way of code expressing, division mode is corresponding to output nerve cell. A conversion is found from input and output logic concept to input and output mode.
从而将字、词或抽象语法规则通过代码的表示方式与输入神经元对应，使切分方式与输出神经元相对应，找到了一个输入、输出逻辑概念到输入、输出模式的转换。 - The pre-functional cell of standard buffered FET logic ( BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability.
此门阵列采用的BFL预功能级标准逻辑单元，具有九种组合逻辑功能及两种不同选择的驱动能力，并具有输出电平调节功能。 - The basic DRAM cell is comprised of a transistor and a capacitor. The digit that is saved in the storage cell is determined as logic 1 or 0, by the voltage potential stored inside the capacitor.
DRAM存储单元由一对MOS管-电容对组成，电容的电位决定了存储单元的逻辑是1还是0。 - LUT-based logic cell has very simple routing demands, which is efficient for logic implementation.
基于LUT的逻辑单元有相当简单的布线需求，对于逻辑实现是最为有效的。 - Through the analysis of static characteristics, experiments and comparison with traditional TTL gates, it is considered that the practical circuit can be adopted as a standard cell for LSI uncommitted logic arrays.
从电路的静态分析入手，通过实验，与传统的TTL标准门进行比较，认为该ULG2实用电路可以胜任作为大规模集成电路待定逻辑阵列中的标准细胞。 - As a design for test technology, the boundary-scan test fixes a special element called boundary-scan cell ( BSC) between the device input pins and the core logic inputs, or between the core logic outputs and the device output pins.
作为一种结构插入的可测性设计技术，边界扫描测试技术将边界扫描测试单元（Boundery-ScanCell，BSC）插在集成电路内部每一个输入输出引脚上。 - New framework of knowledge representation of fuzzy language field and fuzzy language value structure is shown in this paper. Then the generalized cell automation that can synthetically process fuzzy indeterminacy and random indeterminacy and the generalized inductive logic causal model are brought forward.
文中提出基于模糊语言场和模糊语言值结构的知识表示新型框架，并提出能够综合处理模糊不确定性与随机不确定性的广义细胞自动机和广义归纳逻辑因果模型。 - Level restoration pass-transistor logic is proposed for low speed cell while dynamic transmission gate logic for high speed cell.
低速单元采用带有电平恢复的传输管逻辑实现，高速单元采用动态传输门逻辑实现。 - In This paper, based on analysis of the untested factors of the sequence cell, presents a design method, which the test logic inserted, before the scan design.
文中首先分析了时序元件的不可测因素，提出了扫描设计前增加测试逻辑的设计方法。 - The cell fusion instrument consists of high frequency generator, high amplitude pulse generator and sequence control logic unit.
电致融合仪主要由高频交流场、高压窄脉冲发生器以及控制逻辑单元组成。 - According to embedded application, an reformed 2T gain cell structure featured logic technology, improved read speed and extended data retention is acquired by the analyse and comparision of several kinds of DRAM cells.
针对嵌入式应用的目的，在分析比较了各种动态随机存储器单元后得出了一种采用逻辑工艺、单元读出速度优化、数据保持时间延长的改进型2T增益单元。 - In this paper, the advantages of gain cell such as small cell size, logic process compatibility and etc are discussed. Furthermore, four design difficulties, small data retention time, negative voltage requirement, temperature and disturbance sensibility of data retention time are performed detailedly.
重点讨论了该核心单元面积小、与逻辑工艺完全兼容等优点，并提出其设计中的四个难点&数据保持时间短、操作需要负电压、数据保持时间的温度敏感性及易受干扰特性。 - Critical pah was analyzed logical effort model and extended cell library with perfect driving capability was constructed according to analysis result. Critical path was optimized by logic effort algorithm and shortest time-delay could be achieved by equality of cell gate effort in path.
采用逻辑功效模型分析关键路径，根据分析结果构建具有完备驱动能力的扩展单元库，采用逻辑功效算法优化关键路径，使得路径每一级单元的门功效相等，从而获得最短延时。 - It first replaces the Derivative Function Cell in user circuit netlist with Standard Function Cell, then packs the Standard Function Cell, so the number of sample circuits reduction is achieved with implement of the advanced logic function packing.
该方法采用将用户电路网表中的衍生逻辑单元替换为标准逻辑单元，再对标准逻辑单元进行装箱的方式，在实现高级逻辑功能装箱的情况下减少了样本电路总数。 - Organic fluorescent compounds have a wide range of uses because of their special properties. They are applied to solar cell photosensitizer, organic field-effect transistors, fluorescent probes, light-emitting materials, logic gates, light harvesting system and so on.
有机荧光化合物由于其特殊的性能，在太阳能电池光敏剂、场效应晶体管、荧光探针、有机电致发光、逻辑门、光捕获系统等多种领域都有应用。 - The wire load model which based on the lookup table, can give out the cell delay and wire delay according the fan in, fan out and drive length of the logic cells.
基于查找表的线载模型可以计算出逻辑单元的延时，而且可以根据输入斜坡函数和输出电容计算输出斜坡函数。根据负载的大小可以从线载模型的查找表中得到连线延时。 - Second, according to the feature of trap logic unit, we design the high driving capability, special logic and high-speed standard cells, which enhance the ability of standard cell library to support the trap logic unit, and it optimizes the critical path delay greatly.
其次，针对中断逻辑部件的特点，定制设计了大驱动、特殊逻辑和高速的标准单元，增强了标准单元库对中断逻辑部件的支持能力，缩短了关键路径的延时。